1. Field of the Invention
The present invention relates to a method of forming nanowires over a semiconductor fin structure in an integrated circuit.
2. Description of the Prior Art
The present invention relates to a method of forming nanowires over a semiconductor fin structure in an integrated circuit. As the integrated circuit industry continues the trend towards higher levels of integration, three-dimensional fin structures have been used to increase integration over circuit densities achievable using planar MOS structures. In addition, germanium nanowires have been used in favor of silicon due to higher carrier mobility.
A fin structure with germanium nanowires is known. However, the dimensions of the formed germanium structure must be controlled by strictly controlling the epitaxial growth, which may pose difficulties in reliably forming wires of a desired dimension.